1.IP Sections

• Alatek IP CORE Generator v2.0 for ALDEC's Active-HDL 4.2
  - Alatek offers a new IP CORE Generator tool to assist users in the design stage of their projects.  The simple front-end IP CORE Generator is fully integrated and dedicated to the simulator in Aldec's Active-HDL 4.2 design and verification environment.  The IP CORE Generator generates source code in two hardware description languages: VHDL and Verilog.  Each generated module is IC vendor independent and can be adjusted to the user's custom requirements.  Additionally, there are models that optimally support the XILINX® XC4000 device family.  All generated models are fully synthesizeable with Synopsys FPGA Express, Synplicity Synplify and Exemplar logic synthesis tools. (2001.4.9)
• HDLC Controller Design - ECE 551 Final Project Report - [DOC][PDF] (2003.6.16)
• Free Floating-Point Madness! (2003.6.16)
• GM HC11 CPU Core (2003.6.27)
• PIC16C5x: Verilog Example (2003.8.31)
  - 경북대학교, High Speed Digital Circuit Lab., 박정훈님께서 작성하신 PIC16C5x 호환 Microprocessor Source입니다...
• mempkg™ - Modelling Arbitrarily Large Memories in VHDL (2003.9.1)
• HDL Source Library - Yamaoka Hiroaki (2003.12.27)
• nnARM (2004.1.23)
• Complete netlist version of FPGA-8051 and FPGA-6805 synthesizable microcontroller IP cores (2004.1.24)
• Technical IP Protect (IP 권리보호를 위한 기술) 소개, 엄낙웅 / ETRI ASIC 개발팀장 (2004.4.16)
• Silicore Corporation Home Page, LGPL로 제공되는 PIC16C57호환 SLC1567 8bit Microcontroller Core와 VME64 to PCI Bridge SOC Core (2004.5.9)
• Original Synthetic PIC (old VHDL version) - 마이크로칩社의 16C5X와 호환되는 합성가능한 VHDL model입니다, Tom Coonan (2004.7.12)
• Free RISC8 (Verilog) - 마이크로칩社의 15C57과 바이너리 호환되는 RISC8 Processor의 합성가능한 Verilog model입니다, Tom Coonan (2004.7.12)
• Free chips for all, IBM developerWorks (2004.9.27)
• OPEN SOURCE, 부산대학교 전자공학과 집적회로 설계 연구실 (2005.3.19)
• The UCR Dalton Project - IP-Based Embedded System Design (2005.10.17)
• fpgacpu.org - 많은 분들께서 알고계시는 site중 하나입니다...  그러나, 2003년 2월 이후 전혀 update가 없습니다...  따라서 이곳에 보존을 위해서 mirroring하여 제공합니다... (2008.1.7)
• VHDL Soft Cores - High performance FPGA versions of popular microcontrollers... (2008.1.7)

• John Kent's FPGA Projects pages (2008.1.22)
  - 출처는 http://members.optushome.com.au/jekent/...
• FPGA Project Page VHDL & Verilog links
• System68 6800/01 System On a Chip in VHDL
• System11 68HC11 System On a Chip in VHDL
• System09 6809 System On a Chip in VHDL
• System05 6805 System On a Chip in VHDL
• System16 Proposed 16 Bit Microprocessor Design
• Micro8 Very Simple 8 bit Microprocessor Design in VHDL
• Micro16 Very Simple 16 bit Microprocessor Design in VHDL

• Mike Treseler's Folder (2008.3.28)
• MicroCore Home - The MicroCore team has created a synthesizable VHDL description for a simple yet highly performant micro controller core targeted for synthesis into FPGAs...  2005년초 이후 update가 없어보이는 관계로 이곳에 보존을 위해 mirroring하였습니다. (2008.4.21)
• Niktech Inc.'s 32 Bit RISC Soft processor (2008.4.25)

2.References / Manuals / Papers

• ALDEC's VHDL Reference Guide (2000.11.18)
• Advanced Verilog Techniques Workshop by Cliff Cummings (2001.7.11)
• (2001.12.9)
• ModelSim이 설치된 폴더에 들어있는 하위폴더들은 도대체 뭘까? (2004.6.21)
• VERILOG INTRODUCTION FOR DIGITAL DESIGN - Dr. Gerard M Blair (2001.7.22)
• VLSI design articles - Dr. Gerard M Blair (2001.7.22)
• Guide to HDL Coding Styles for Synthesis - v1999.10 (Synopsys) (2003.1.6)
1. About This Guide
2. Table of Contents
3. Coding Styles for if Statements and case Statements
4. Coding if and case Statements for Late Arriving Signals
5. Coding Styles for Logic Building Blocks
6. High-Performance Coding Techniques
7. General Coding Style Guidelines

• The NASA ASIC Guide: Assuring ASICS for Space Draft 0.6 (2003.1.27)
• An ASIC Primer, LSI Logic Corporation (2004.1.18)
• Advanced High-level HDL Design Techniques for Programmable Logic (2003.2.15)
• VHDL Modeling Terminology and Taxonomy Version 3.1, May 26, 2000 (2003.3.10)
• A short primer on performing arithmetic with std_logic_vector- Bill Sackett / Symbol Technologies, Inc. (2003.8.30)
• VHDL / Verilog Coding for FPGAs, Produced by: Technically Speaking, Inc for DynaChip Corporation (2003.11.24)
• VHDL reference material, Department of Computer Science & Electrical Engineering, University of Maryland Baltimore County (2004.1.2)
• VHDL Reference Manual, March 1997, SYNARIO (2004.8.22)
• Synplify Pro에서 Synthesis후에 ModelSim에서 Simulation하기 위한 절차 및 방법, Synplicity Korea / Sr. F.A.E. / 김경모 (2004.1.4)

• IEEE Standard VHDL Language Reference Manual (IEEE Std. 1076-1993)
• IEEE Standard Test Access Port and Boundary-Scan Architecture (IEEE Std. 1149.1-2001) (2004.8.15)

• On-line Verilog HDL Quick Reference Guide by Stuart Sutherland of Sutherland HDL, Inc. - Portland, Oregon, USA (2003.9.1)
• Comparison of VHDL, Verilog and SystemVerilog, Stephen Bailey, Technical Marketing Engineer, Model Technology (2004.3.12)
• The Ten Commandments of Excellent Design - VHDL Code Examples, Peter Chambers, Engineering Fellow, VLSI Technology (2004.8.15)
• VHDL Language Guide, Altium Limited. (2005.1.3)
• Verilog Coding Style for Efficient Digital Design, Kapil Batra & Mohammad Suhaib Husain (2008.1.18)
• VHDL MINI-REFERENCE (2008.3.28)
• VeriBest FPGA Synthesis VHDL Reference Manual - DLA029300, Kirk Owyang/Synopsys - A.J. Herran/VeriBest (2008.3.31)
• VHDL Reference (2008.3.31)
• Comparing Verilog to VHDL Syntactically and Semantically, by Johan Sandstrom (2008.3.31)

• Advanced Synthesis Techniques, designAbstraction Ltd. (2008.4.3)
• eXsultation Reference Guides - electronic version (2008.4.25)
• VHDL Reference Guide
• VHDL VHPI Reference Guide
• Verilog Reference Guide
• Verilog PLI Reference Guide
• VHDL Handbook, HARDI Electronics AB (2015.10.18)

3.Text Books

• Computer Aids for VLSI Design (2001.6.25)
  Free Software Foundation의 GNU Project를 통해서 electric이라는 CAD electrical circuit design system을 공개중이신 Steve Rubin님께서 쓰신 글입니다...
• Digital Systems Design Using VHDL / 1st Edition / Charles H. Roth, Jr. (2003.8.30)
  Digital 개념을 가지고 설명하고 있어서 단순히 언어공부보다 Digital에 적용해서 공부할 수 있다는 장점이 있는 책입니다. 특히 알테라와 자일링스 툴을 소개하는 부분도 있습니다.
  - [교재에서 사용된 그림들을 모아놓은 Slide모음 파일] 파일명: rothslide.zip (4,173,658 bytes)
  - [교재내에서 설명된 VHDL 예제 모음] 파일명: rothvhdl.zip (62,578 bytes)
• CSCI 320 Computer Architecture Handbook on Verilog HDL (2003.9.1)
• VHDL Language 요약 / 2000.2 / 연세대학교 기전공학부 전기전공 / 김재석 교수 (2003.11.18)
• The Verilog Hardware Description Language / 1998 / Carnegie Mellon University / Don Thomas (2003.11.24)
• [ETRI] ASIC 회로설계 입문, 한국전자통신연구원, 여순일 (2004.3.8)
• [ETRI] A Designer's Guide to VHDL Synthesis, ASIC지원센터 (2004.3.8)

• 하드웨어 설계, 이제는 프로그래밍으로! - 월간 마이크로 소프트웨어 / 실전 강의실 VHDL / 곽종욱 (2004.1.11)
• 1회 2002.08 | 최상의 하드웨어 설계 방법을 찾아라
• 2회 2002.09 | 완벽한 하드웨어 기술언어, VHDL
• 3회 2002.10 | 나의 첫 하드웨어 프로그래밍, 자판기 설계 프로젝트

• VHDL을 이용한 효율적인 디지털 시스템 설계, 인천대학교 공과대학 전자공학과 System ASIC Design Lab., 조중휘 교수 (2004.5.10)
• VHDL Simulation과 Synthesis의 기초 실습 (Synopsys Tool을 중심으로), 인천대학교 공과대학 전자공학과 System ASIC Design Lab., 조중휘 교수 (2004.5.10)
• Synthesizable Verilog-HDL Code , Huai-Yi Hsu, Access IC Lab., Electrical Engineering, National Taiwan University (2004.8.15)
• 디지탈 시스템 설계 특론 (Digital Systems Design), Spring Semester 2002 일반대학원 컴퓨터공학전공 (충남대학교) (2004.12.6)

4.Tutorials

• Stefan Doll's VHDL Verification Course - An On-line course covering Basics of VHDL modeling and verifcation (2003.1.26)
• FSM Tutorial (2001.7.9)
• Green Mountain VHDL Tutorial (2003.6.27)
• VHDL 기초강좌 - 한글교재 (2003.6.30)
• 임규삼님께서 작성하신 VHDL Tutorial (2003.8.31)
  - VHDL Concept / VHDL Basic
• VHDL Short Manual / 광운대학교, Digital Design & Test Lab., 김동욱 교수 (2004.1.21)
• Jan Van der Spiegel, "VHDL Tutorial" (2005.9.19)
• VHDL Tutorial: Learn by Example (2008.3.31)
• ASIC, VHDL, Verilog Tutorials - University of Waterloo ASIC Design Team (2008.4.21)

5. RESOURCES / Courses / Seminar

• Dr. Gerard M Blair was a Senior Lecturer in the Department of Electrical Engineering at the University of Edinburgh. (2001.7.22)
• RASSP Legacy Data: Lockheed Martin Advanced Technology Laboratories - Rapid Prototyping of Application-Specific Signal Processors (2003.3.10)
• Bob Reese's Home Page: An associate professor in the Electrical and Computer Engineering department at Mississippi State University. (2003.8.11)
• http://www.erc.msstate.edu/~reese/vhdl_synthesis/에 있던 "A free tutorial on synthesis of digital hardware using VHDL" html 문서는 아래 두 개의 교육코스로 대체가 되었습니다...
• Course notes on Logic Design Course with VHDL
• Course notes on Modeling with VHDL
• ModelSim 5.8 SystemVerilog Seminar CDROM (2004.9.12)
• Transition to Precision RTL Synthesis for LeonardoSpctrum Users, Mentor Graphics (2004.12.10)
• ESE 201: Principles of Digital Design Laboratory, Fall 2005 / Department of Electrical and Systems Engineering / Univ. of Pennsylvania (2005.9.19)

6. Misc. (Tools, Articles, etc...)

• IP-Based SOC Design in an in-house C-based design methodology, Marcello Lajolo / NEC Laboratories America / Princeton, NJ, USA (2004.3.3)
• 새로운 방식의 오픈 소스 VHDL 컴파일러 "GHDL", 2003년7월5일, EETKorea (2004.7.6)