Structural VHDL - Module 2
Table of Contents
Structural VHDL - Module 2
Outline
RASSP Roadmap
Module Goals
Introduction - Structural VHDL
Putting It All Together
Concepts of Structural VHDL
Component Instantiation
Visibility of Components
Component Declaration
Instantiation Statements
Components From Packages
Generics
Generics: An Example
Generic Map
Restrictions on Instantiation
Rules for Actuals and Locals
Generate Statements
Uses of Generate Statements
FOR-Scheme
FOR-Scheme Example
IF-Scheme
IF-Scheme Example
Configuration and Binding
Need for Configuration
Configuration Specification
Component Specification
Binding Indication
Configuration Specification: Example
Summary
References
