VHDL Objects:

VHDL constants are objects with permanently assigned values. The value of a constant, however, does not need to be assigned at the time the constant is declared; it can be assigned later in a package body if necessary.

The syntax of the constant declaration statement is shown above. The constant declaration includes the name of the constant, its type, and, optionally, its value.

Constant assignments can be deferred in the package declarations. The assignment can then be made in the package body.