Even Signal
Assignment Statements!

ARFCHITECTURE example OF
    full_adder is

BEGIN

   Summation:  PROCESS( A, B, Cin)
      BEGIN
        Sum <= A xor B xor Cin;
   END PROCESS Summation;

   Carry:  PROCESS( A, B, Cin)
      BEGIN
      Cout <=  (A and B) or
	(A and Cin) or
	(B and Cin);
      END PROCESS Carry;
END example;

  ARCHITECTURE example OF
    full_adder is

   BEGIN

      Sum <= A xor B xor Cin;

      Cout <=   (A and B) or
	(A and Cin) or
	(B and Cin);

   END Example;