FEEDBACK ON THE GATEWAY CHRISTMAS 1997 ASSIGNMENT

Most of you seem to have managed the design. If you had trouble with it, make sure you attend the labs this term to get yourself up to speed with the design process and with your Verilog skills.

Some of these were very well done, and some not so well done. This section lists some common mistakes in the hope that you can learn from the past when you come to write up your Spring assignment, which consists of Verilog code for a design and another Electronics Letter. Please re-read Dr Blair's web page (in the Gateway area) on Feedback from 1996 showing common mistakes; quite a few of the mistakes listed there were repeated in 1997.

(a) Structure

Most people structured their paper with a beginning, middle and end, using headings like Introduction, Design and Conclusions. Some people did better than this. There was nothing wrong with these headings, but give some thought to how you are going to structure the Electronics Letter for your Spring assignment. The design is going to be larger, but you'll still only have a short paper in which to explain it.

(b) Abstract

As in 1996, the abstract was often too short. Sometimes it was factually incorrect (eg "This paper gives details of ..." when the paper clearly didn't). Re-read the 1996 feedback page.

(c) Description of the design

Remember that the reader of your Electronics Letter must have convincing evidence that you have done what you say. You must present enough details of what you've done so that this is clear.

Also, think carefully about what you have to do to fulfil the requirements of the assignment. The specification of the Christmas Design Exercise clearly said :

You are expected to produce a design with the details of the gate-level implementation down to primitive boolean gates and a dtype (or an m-bit dtype) which, of course, will be behavioural.
but many people did not do this.

It is not easy to explain details in a short paper, which is why you must think carefully about it.

(d) Conclusions

Re-read the 1996 feedback page. The same mistakes were evident in 1997.

(e) References

Think what written materials you have used in doing the assignment, and refer to them.
• References to web pages are acceptable if the pages themselves will be meaningful to the reader
• There should be a labelled cross-reference in the text to any reference at the end of the paper. In the case of Electronics Letters the label is a number. If you don't put a label in, the reader doesn't know why you've included the reference at the end.
• The references at the end should be complete. Look at the example Dr Blair provided for you on the Gateway web pages, and at other examples in the library, to see what's required.

(f) Diagrams

Diagrams were, in general, very good and clear. Make sure you label them properly: some high-level diagrams didn't have labels on the inputs and outputs to blocks, which makes it very difficult for the reader to follow.

(g) Spelling and grammar

Re-read the 1996 feedback page. Nobody expects magnificent prose, but watch out for the following :

• Anyone can make a mistake in their spelling, but 95% of spelling mistakes should be easy to find with a spelling-checker.
• Anyone can make a mistake in their grammar, but a careful re-reading your paper should make most of these mistakes obvious.
• Electronics Letters is a formal paper. The web page you are currently reading is full of "don't"s, "isn't"s and "what's"s, but these constructions are not appropriate for a formal paper.

Good luck with your Spring assignment.

Robin Woodburn

22 January, 1998