작성일: 2013.09.25

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Programmable World 2003

  • 일시: 2003년 6월 20일
  • 장소: Grand Intercontinental Hotel, Grand Ballroom

< Korea Forum Agenda >

Title / Description   Speaker
Technical Session:
Solving the Connectivity Challenge
  Xilinx
This session will offer strategies that solve the challenges of integrating ASSPs, network processors, and memory devices into a viable electronic product. Issues such as standards compliance, bridging between different interface technologies, and parallel-to-serial connectivity will be covered.
 
Technical Session:
Challenges and Design Methods of Integrating New Processor Architectures
  IBM
This session will offer techniques for dealing with complex designs and shifting architecture requirements to capitalize on performance advantages in new technology, evolving standards, and a rapidly changing industry landscape. IBM's PowerPC™ processors, CoreConnect™ architecture and library of ASIC cores can be combined with flexible FPGA technology from Xilinx to deliver state of the art solutions.
   
Technical Session:
Methods of Using Processor Cores to Optimize System Performance and Cost
  Xilinx
In this session, the audience will learn about ways to combine the strengths of both the processor and logic, to optimize the system for performance and cost.
     
Technical Session:
The Future of Digital Signal Processing
  Xilinx
This session will explore technical trends in digital signal processing and present a case for new DSP architectures and system level design methodologies. The session will also include demonstrations of leading edge system level design methodologies that allow engineers to develop high-performance DSP systems (datapath and control) quickly and efficiently.
     
Technical Session:
Addressing the Growing Verification Challenge for Highly Integrated Systems
  Agilent
This session will review the growing challenges of system verification and HW / SW debug. The audience will get an insight into the latest design and debugging methodologies.
     
Technical Session:
Challenges and Design Solutions to Upgrade Existing Systems for Higher Bandwidth

 

Xilinx (Part 1)
Cadence (Part 2)

Part 1
To address the challenges of upgrading existing systems for higher bandwidth, the audience will be guided through the implementation of multi-gigabit serial interfaces for chip-to-chip and backplane communications.
Part 2
This session will talk about the challenges of designing PCB systems that incorporate today's blazing fast silicon.
     
New Product Introductions / Announcements   Xilinx
Spartan™-3 Platform FPGA
Join us for a groundbreaking event in programmable device history - the introduction of the Spartan-3 Platform FPGA. The Spartan-3 FPGA family, built on the success of four generations of cost-optimized Spartan-FPGAs, offers a low cost platform with a wide range of I/O, density options and system level features. Benefits include fast time-to-market, low unit cost, short development times and never again having to worry about high ASIC NRE cost. From prototyping to production, Spartan-3 FPGAs are the answer.
RocketPHY Family of Devices
Learn about the immediate availability of its RocketPHY family of devices - the FPGA industry's first 10 Gbps silicon. Based on a standard CMOS technology, the RocketPHY family of physical layer transceivers (PHYs) provides optimal performance, cost, and power consumption through the integration of transmitter and receiver functions and key features that help simplify the cost and complexity of design. Xilinx is the first programmable logic supplier - and among the first in the ASIC market - to deliver CMOS solutions at 10 Gbps that meet SONET compliant jitter.
Virtex-II Pro™ X
See the unveiling of the Virtex-II Pro X architecture, which will incorporate 10 Gbps serial transceivers. Designers of high performance networking, storage, and image processing systems can begin designing 10 Gbps applications today with the Virtex-II Pro X architecture using the company's latest ISE 5.2i software development tools, through an early customer access program.
 
For event information, please contact: pw2003@xilinx.com

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