library ieee;
use ieee.std_logic_1164.all;

entity buf8 is
  port (  din:  in std_logic_vector(7 downto 0);
		  dout: out std_logic_vector(7 downto 0)
       );
 end buf8;
 architecture a of buf8 is
 begin
     dout <= din;
 end a;

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