--------------------------------------------------
-- Model : 8051 Behavioral Model,
-- VHDL Entity mc8051.prog_rom.interface
--
-- Author : Michael Mayer (mrmayer@computer.org),
-- Dr. Hardy J. Pottinger,
-- Department of Electrical Engineering
-- University of Missouri - Rolla
--
-- Created at : 09/22/98 19:33:01
--
LIBRARY ieee ;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY mc8051 ;
USE mc8051.synth_pack.all;
ENTITY prog_rom IS
PORT(
int_clk : IN std_logic ;
int_rst : IN std_logic ;
p0_addr : IN std_logic_vector( 7 DOWNTO 0 ) ;
p2_addr : IN std_logic_vector( 7 DOWNTO 0 ) ;
rom_rd_n : IN std_logic ;
rom_data : OUT std_logic_vector( 7 DOWNTO 0 )
);
-- Declarations
END prog_rom ;
--
-- VHDL Architecture mc8051.prog_rom.behav
--
-- Created:
-- by - mrmayer.UNKNOWN (eceultra20.ece.umr.edu)
-- at - 19:04:13 09/19/98
--
-- Generated by Mentor Graphics' Renoir(TM) 3.4 (Build 18)
--
architecture behav of prog_rom is
begin
end behav;
<div align="center"><br /><script type="text/javascript"><!--
google_ad_client = "pub-7293844627074885";
//468x60, Created at 07. 11. 25
google_ad_slot = "8619794253";
google_ad_width = 468;
google_ad_height = 60;
//--></script>
<script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js">
</script><br /> </div>